[筆記] SERR

(1)

When I want to make uncorrectable error on ROOT PORT by setting the bit[0]

of PXH's offset 228h, the active will cause NMI. The NMI handler will be

execution. The handler will not only HOT RESET PXH, But scanning bus and

finding which device should be served.

(2)

If I do the active (1) without setting MASK Reg. the error will be logged and

pending bit on PCI STS will be set.

(3)

According to (1) and (2), the NMI handler will scan bus and find out the

pending bit on PCIe Root Port, so the error will be reported via SourthBridge

and cause the system halt

(4)

If I disable SERR enable on SB's CMD Reg. , system will not halt because

the SERR  is disable and SB can not use SERR to report ERROR.

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To find the routing path of Error msg, the next step I should do is making

the System not halt. To attempting this goal, I should modify NMI handler

skip pending bit on Root Port, so that they will not halt when I do the actions

(1) and (2)